Generally speaking, a power IC includes high-voltage power devices and low-voltage integrated circuit, wherein the high-voltage power devices are controlled and examined by the low-voltage integrated circuit. In the low-voltage integrated circuit, a low-voltage power supply is needed and the voltage of the power supply should be much lower than the voltage of the power supply for the power devices. Although a low-voltage power supply can be realized by switching a high-voltage device, and converting high-voltage power supply to low-voltage power supply through a converter, at least one low-voltage power supply is necessary for the initial switching operation.
FIG. 1 shows schematically a conventional structure of power supply for the low-voltage integrated circuit realized by a capacitor. As shown in FIG. 1, the low-voltage integrated circuit controls the turning-on and -off of high-voltage power device (see n-type Metal-Oxide-Semiconductor Field-Effect Transistor (n-MOST) in FIG. 1), and the capacitor C serves as the power supply to the low-voltage integrated circuit. To be specific, the drain electrode D of power n-MOST has a positive voltage VDS with respect to the source electrode S, and the gate-source voltage VGS produced by the low-voltage integrated circuit is used to control the current of the power n-MOST. The positive voltage VS′S with respect to the source electrode S, which is formed by the charges accumulated on the capacitor C, provides power supply for the low-voltage integrated circuit. In conventional techniques, the capacitor is charged by high-voltage power supply, and VS′S is much lower than VDS (refer to Ref [1]). In practice, the capacitor C can be charged by connecting it in series to the high-voltage terminal through a resistance. However, the integrated of resistance in power IC is at an expense of the cost.
Besides, the series resistance can be an active one, which must be normally-on (e.g. a depletion mode high-voltage MOST), and only can be turned off when the capacitor is charged up to a certain voltage (refer to Ref [2]). However, power devices are mostly normally-off high-voltage devices and to implement both of high-voltage normally-on and normally-off devices in one chip will increase the fabrication cost. In order to avoid the extra cost caused by the implement of normally-on device, an isolated region of an opposite conductivity type with the substrate can be implemented in the surface of substrate.
FIG. 2 shows schematically the structure of conventional technology of power supply of a low-voltage circuit by using a region of an opposite conductivity type with substrate underneath the surface to charge capacitor C. As shown in FIG. 2, the left portion of the left dashed line and the right portion of the right dashed line are n-VDMOSTs, and a floating p-region is underneath the surface of n-substrate between the two dashed lines; when VDS increases from 0V to a certain level, the n−-substrate surrounded the floating p-region can be fully depleted, inducing a positive voltage with respect to source electrode S in the floating p-region, and charging the capacitor C to the required value Vs′s. The floating p-region is directly used as an output terminal of the low-voltage power supply, or as a control voltage of a transistor to indirectly control the current provided to low-voltage power supply. In FIG. 2, there is a diode D in the charging path for floating p-region and capacitor C to prevent the current flowing back with potential decreasing of floating p-region (refer to Ref [3])
In practice, in order to continually maintain VS′S at a constant value but not too high during the switching operation state of the power device, a controlled MOST is usually connected in series between the electrode connecting with floating p-region and source electrode S. When the value of VS′S is over high, making the potential of floating p-region lower than the anode of capacitor C, the floating p-region does not charge capacitor C any more. Turn on the MOST by controlling its gate voltage, the charges in the floating p-region will flow to source S through the MOST, causing the potential of floating p-region to decrease. The recharging of capacitor C can be realized by turning off the MOST. The disadvantage of this method is that the only path for supplying charges to floating p-region to increase its potential is the leakage current from the reverse-biased p-n junction constructed by the floating p-region and n−-substrate. Due to the leakage current is very small, a long time is needed to make the potential of floating p-region reach the required value, which is a disadvantage in most cases.